11 b 200 MS/s 28‐nm CMOS 2b/cycle successive‐approximation register analogue‐to‐digital converter using offset‐mismatch calibrated comparators

Design of CMOS Comparators for FLASH ADC

The analog to digital converters is the key components in modern electronic systems. As the digital signal processing industry grows the ADC design becomes more and more challenging for researchers. In these days an ADC becomes a part of the system on chip instead of standalone circuit for data converters. This increases the requirements on ADC design concerning for example speed, power, area, ...

A 20Gb/s 136fJ/b 12.5Gb/s/μm On-Chip Link in 28nm CMOS

A high data rate, low power on-chip link in 28nm CMOS is presented. It features a double-sampling receiver with dynamic offset modulation and a capacitively-driven transmitter. The functionality of the link was validated using 4-7mm minimum-pitch on-chip wires. It achieves up to 20Gb/s of data rate (13.9Gb/s/μm) with BER< 10−12. It has better than 136fJ/b of power efficiency at 10Gb/s. The tota...

A High Speed 3.3V Current Mode CMOS Comparators with 10-b Resolution

: This paper presents a high speed current mode CMOS comparator. The comparator was optimized for allows wide range input current 1mA, ±0.5uA resolution and has fast response. This circuit was implemented with 0.8μm CMOS nwell process with area of 120μm X 105μm and operates with 3.3V (±1.65V).

A high-speed analog-to-digital converter using Josephson self-gating-AND comparators

Digitally Programmable Floating Impedance Converter using CMOS-DVCC

A novel digitally programmable floating impedance converter circuit is realized using two CMOS digitally programmable differential voltage current conveyors and three grounded passive elements. The realized impedance converter can provide digitally programmable floating impedances like ideal floating resistor, capacitor, inductor and frequency dependent negative resistor through appropriate sel...